Novel XOR-XNOR Logic Gate: A Paradigm of Low Power Consumption and Energy Efficiency

Novel XOR-XNOR Logic Gate: A Paradigm of Low Power Consumption and Energy Efficiency
  IJETT-book-cover           
  
© 2024 by IJETT Journal
Volume-72 Issue-3
Year of Publication : 2024
Author : Anju Rajput, Renu Kumawat, Avireni Srinivasulu
DOI : 10.14445/22315381/IJETT-V72I3P113

How to Cite?

Anju Rajput, Renu Kumawat, Avireni Srinivasulu, "Novel XOR-XNOR Logic Gate: A Paradigm of Low Power Consumption and Energy Efficiency," International Journal of Engineering Trends and Technology, vol. 72, no. 3, pp. 127-152, 2024. Crossref, https://doi.org/10.14445/22315381/IJETT-V72I3P113

Abstract
This study takes a close look at the numerous XOR and XNOR cell designs that have been reported throughout the years, beginning with the earliest ones and working all the way up to the most current ones that have been published. The study then proposed five new XOR structures and two new XNOR designs, with potential applications in error detection, logic comparators, cryptographic algorithms, and other fields, while comparing their performance to that of existing designs from other researchers pertaining to latency, power lag solution, and dissipation of power. During the course of this investigation, technical files pertaining to both 32nm and 16nm processing will be utilized. The voltage of the power supply is going to be 0.6v. A thorough comparison of proposed XOR and XNOR gates with existing XOR-XNOR gate designs at the level of the transistor relying on input voltage levels, average current propagation latency, energy efficiency of the proposed circuit transistor counts, and amount of power usage has been carried out. A thorough evaluation unambiguously reveals that the proposed designs outperform their equivalents in terms of power consumption, latency, area efficacy, and total energy efficiency. The Synopsys HSPICE tool is employed to simulate the suggested circuits.

Keywords
Digital circuits, Full adder, Power-delay product, Propagation delay, Transistor count.

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