Optimization of Retention Time in 3T DRAM using Anti-Body Bias Technique in Nanoscale Technology

Optimization of Retention Time in 3T DRAM using Anti-Body Bias Technique in Nanoscale Technology
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© 2022 by IJETT Journal
Volume-70 Issue-11
Year of Publication : 2022
Authors : Amol S. Sankpal, D.J. Pete
DOI : 10.14445/22315381/IJETT-V70I11P239

How to Cite?

Amol S. Sankpal, D.J. Pete, "Optimization of Retention Time in 3T DRAM using Anti-Body Bias Technique in Nanoscale Technology," International Journal of Engineering Trends and Technology, vol. 70, no. 11, pp. 378-392, 2022. Crossref, https://doi.org/10.14445/22315381/IJETT-V70I11P239

Abstract
Retention time is responsible for data storage operation in semiconductor memories. But it depends upon the charge retention capacity of the storage capacitor. During the implementation of low-power electronic gadgets, small device geometry, minimum operating voltage and optimization in parameters circuit designers face the issues of leakage parameters to great extent. As the demand for high-density storage memories increases day by day moore’s law supports more number of transistor in the nanometer area on the silicon wafer. Scaling plays a crucial role in small device geometry in nanometer scale cmos technology but it has some limitations over it. In this paper leakage parameters, comparative analysis using cmos, finfet and anti-body bias technique for retention time improvement is carried out. 3T DRAM having an inverter circuit with proper biasing at the substrate terminal offer minimized leakage parameter and improvement in retention time is observed. Cmos, finfet and anti-body bias technique in 3T DRAM is implemented with 90nm technology using a cadence tool. In supply voltage variation leakage current reduction is observed at 75% in the finfet technique and 82% observed in the anti-body bias technique. In capacitance value variation leakage current reduction is observed at 94% in the finfet technique and 96% observed in the anti-body bias technique. Anti-body bias technique offers excellent results in comparison with cmos and finfet technology is examined.

Keywords
Anti-body bias, Cmos, Finfet, Leakage current, Refresh frequency, and Retention time.

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